85352AYILF datasheet(10/21 Pages) RENESAS

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Revision C, December 1, 2015

85352 Datasheet

Differential Clock Input Interface

The CLK /nCLK accepts LVDS, LVPECL, LVHSTL, SSTL, HCSL and

other differential signals. Both V

SWING and VOH must meet the VPP and

CMR input requirements. Figures 3A to 3F show interface examples

for the CLK/nCLK input driven by the most common driver types. The

input interfaces suggested here are examples only. Please consult

with the vendor of the driver component to confirm the driver

termination requirements. For example in Figure 3A, the input

termination applies for IDT LVHSTL drivers. If you are using an

LVHSTL driver from another vendor, use their termination

recommendation.

Figure 3A. CLK/nCLK Input

Driven by an IDT LVHSTL Driver

Figure 3C. CLK/nCLK Input

Driven by a 3.3V LVPECL Driver

Figure 3E. CLK/nCLK Input

Driven by a 3.3V HCSL Driver

Figure 3B. CLK/nCLK Input

Driven by a 3.3V LVPECL Driver

Figure 3D. CLK/nCLK Input

Driven by a 3.3V LVDS Driver

Figure 3F. CLK/nCLK Input Driven by a 2.5V SSTL Driver

1.8V

Zo = 50

CLK

nCLK

3.3V

LVHSTL

IDT

LVHSTL Driver

Differential

Input

HCSL

*R3

*R4

CLK

nCLK

3.3V

Differential

Input

CLK

nCLK

Differential

Input

SSTL

2.5V

Zo = 60

2.5V

3.3V

120

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