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83C751 bảng dữ liệu(PDF) 19 Page - NXP Semiconductors

tên linh kiện 83C751
Giải thích chi tiết về linh kiện  80C51 8-bit microcontroller family 2K/64 OTP/ROM, I2C, low pin count
PDF  24 Pages
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nhà sản xuất  PHILIPS [NXP Semiconductors]
Trang chủ  http://www.nxp.com
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83C751 bảng dữ liệu(HTML) 19 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
83C751/87C751
80C51 8-bit microcontroller family
2K/64 OTP/ROM, I2C, low pin count
1998 May 01
19
EPROM PROGRAMMING AND VERIFICATION
Tamb = 21°C to +27°C, VCC = 5V ±10%, VSS = 0V
SYMBOL
PARAMETER
MIN
MAX
UNIT
1/tCLCL
Oscillator/clock frequency
1.2
6
MHz
tAVGL1
Address setup to P0.1 (PROG–) low
10
µs + 24tCLCL
tGHAX
Address hold after P0.1 (PROG–) high
48tCLCL
tDVGL
Data setup to P0.1 (PROG–) low
38tCLCL
tGHDX
Data hold after P0.1 (PROG–) high
36tCLCL
tSHGL
VPP setup to P0.1 (PROG–) low
10
µs
tGHSL
VPP hold after P0.1 (PROG–)
10
µs
tGLGH
P0.1 (PROG–) width
90
110
µs
tAVQV2
VPP low (VCC) to data valid
48tCLCL
tGHGL
P0.1 (PROG–) high to P0.1 (PROG–) low
10
µs
tMASEL
ASEL high time
13tCLCL
tHAHLD
Address hold time
2tCLCL
tHASET
Address setup to ASEL
13tCLCL
tADSTA
Low address to valid data
48tCLCL
NOTES:
1. Address should be valid at least 24tCLCL before the rising edge of P0.2 (VPP).
2. For a pure verify mode, i.e., no program mode in between, tAVQV is 14tCLCL maximum.
5V
12.75V
5V
25 PULSES
tSHGL
tGHSL
tGLGH
tGHGL
98
µs MIN
10
µs MIN
tMASEL
tHASET
tADSTA
tDVGL
tGHDX
tAVQV
VERIFY MODE
PROGRAM MODE
VERIFY MODE
P0.2 (VPP)
P0.1 (PGM)
P0.0 (ASEL)
PORT 3
PORT 1
INVALID DATA
VALID DATA
DATA TO BE PROGRAMMED
INVALID DATA
VALID DATA
HIGH ADDRESS
LOW ADDRESS
tHAHLD
tAVGL
SU00303
Figure 7. Program/Verify Cycle
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent
to use the components in the I2C system provided the system conforms to the
I2C specifications defined by Philips. This specification can be ordered using the
code 9398 393 40011.



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