74LVC2G74_1

© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

Product data sheet

Rev. 01 — 3 November 2005

12 of 20

Philips Semiconductors

74LVC2G74

Single D-type flip-flop with set and reset; positive edge trigger

13. Waveforms

Measurement points are given in Table 11.

The shaded areas indicate when the input is permitted to change for predictable output

performance.

Fig 6.

The clock input (CP) to output (Q, Q) propagation delays, the clock pulse width,

the D to CP set-up, the CP to D hold times and the maximum clock pulse

frequency

Table 11:

Measurement points

Supply voltage

Input

Output

1.65 V to 1.95 V

0.5

0.5

2.3 V to 2.7 V

0.5

0.5

2.7 V

1.5 V

1.5 V

3.0 V to 3.6 V

1.5 V

1.5 V

4.5 V to 5.5 V

0.5

0.5

mnb141

GND

GND

CP input

D input

Q output

Q output