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853S01 bảng dữ liệu(PDF) 11 Page - Renesas Technology Corp

tên linh kiện 853S01
Giải thích chi tiết về linh kiện  2:1 Differential-to-LVPECL Multiplexer
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853S01 bảng dữ liệu(HTML) 11 Page - Renesas Technology Corp

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©2016 Integrated Device Technology, Inc.
Revision B, March 4, 2016
853S01 Datasheet
LVPECL Clock Input Interface (2.5V)
The PCLK /nPCLK accepts LVPECL, LVDS and other differential
signals. The differential signal must meet the VPP and VCMR input
requirements. Figures 3A to 3C show interface examples for the
PCLK/nPCLK input driven by the most common driver types. The
input interfaces suggested here are examples only. If the driver is
from another vendor, use their termination recommendation. Please
consult with the vendor of the driver component to confirm the driver
termination requirements.
Figure 3A. PCLK/nPCLK Input Driven by a 2.5V LVDS
Driver
Figure 3C. PCLK/nPCLK Input Driven by a 2.5V LVPECL
Driver
Figure 3B. PCLK/nPCLK Input Driven by a 3.3V LVPECL
Driver with AC Couple
PCLK
nPCLK
PCLK
nPCLK



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