AT45DB161E datasheet(28/77 Pages) RENESAS

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DS-AT45DB161E-8782 Rev. P

Page 28

1/27/23

AT45DB161E Datasheet

8.3.3

Read Sector Protection Register

To read the Sector Protection Register, an opcode of 32h and three dummy bytes must be clocked into the device.

After the last bit of the opcode and dummy bytes have been clocked in, any additional clock pulses on the SCK pin

results in the Sector Protection Register contents being output on the SO pin. The first byte (byte location 0)

corresponds to Sector 0 (0a and 0b), the second byte corresponds to Sector 1, and the last byte (byte location 15)

corresponds to Sector 15. Once the last byte of the Sector Protection Register has been clocked out, any

additional clock pulses result in undefined data being output on the SO pin. The CS pin must be deasserted to

terminate the Read Sector Protection Register operation and put the output into a high-impedance state.

Table 13. Read Sector Protection Register Command

Note: XX = Dummy byte

Figure 10. Read Sector Protection Register

8.3.4

About the Sector Protection Register

The Sector Protection Register is subject to a limit of 10,000 erase/program cycles. Users are encouraged to

carefully evaluate the number of times the Sector Protection Register is modified during the course of the

application’s life cycle. If the application requires that the Security Protection Register be modified more than the

specified limit of 10,000 cycles because the application needs to temporarily unprotect individual sectors (sector

protection remains enabled while the Sector Protection Register is reprogrammed), then the application needs to

limit this practice. Instead, a combination of temporarily unprotecting individual sectors along with disabling sector

protection completely needs to be implemented by the application to ensure that the limit of 10,000 cycles is not

exceeded.

Command

Byte 1

Byte 2

Byte 3

Byte 4

Read Sector Protection Register

32h

XXh

32h

Data

n + 1

Data

n + 15

Each transition represents eight bits

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