ICS9P960 datasheet(9/13 Pages) RENESAS

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9P960

DUAL CHANNEL DDRII/III ZERO DELAY BUFFER

IDT® DUAL CHANNEL DDRII/III ZERO DELAY BUFFER

9P960

REV A 051811

I2C Table: Revision ID and Vendor ID Register

Byte 10

Name

Control Function

Type

Default

Bit 7

Revision_ID bit 3

Bit 6

Revision_ID bit 2

Bit 5

Revision_ID bit 1

Bit 4

Revision_ID bit 0

Bit 3

Vendor_ID bit3

Bit 2

Vendor_ID bit2

Bit 1

Vendor_ID bit1

Bit 0

Vendor_ID bit0

I2C Table: Byte Count Register

Byte 15

Name

Control Function

Type

Default

Bit 7

BC7

Bit 6

BC6

Bit 5

BC5

Bit 4

BC4

Bit 3

BC3

Bit 2

BC2

Bit 1

BC1

Bit 0

BC0

Rev ID

Vendor ID

Byte Count Programming

b(7:0)

Writing to this register will

configure how many bytes will be

read back, default is 0F = 15

bytes

Table 1: 7-Steps Skew Programming Table

7 S te p

LSB

900 ps

750 ps

600 ps

450 ps

N/A

300 ps

N/A

150 ps

N/A

0.0 ps

MSB

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