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ST25R3920B bảng dữ liệu(PDF) 18 Page - STMicroelectronics

tên linh kiện ST25R3920B
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ST25R3920B bảng dữ liệu(HTML) 18 Page - STMicroelectronics

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Description
ST25R3920B
18/158
DS13890 Rev 4
In Transparent mode the framing and FIFO are bypassed. The digitized subcarrier signal
directly drives the MISO pin.
2.2.13
FIFO
The ST25R3920B contain a 512-byte FIFO. Depending on the direction of the data transfer,
it contains either data which has been received or data which is to be transmitted.
In reader mode the ST25R3920B can transmit frames of up to 8191 bytes length and
receive frames of arbitrary length.
2.2.14
Control logic
The control logic contains I/O registers that define the operation of device.
2.2.15
Host interface
A 4-wire serial peripheral interface (SPI) and a 2-wire I2C interface are available to
communicate with an external microcontroller. The pins for the SPI and the I2C interface are
shared, and pin I2C_EN is used to select the active interface.
2.2.16
Passive target memory
The device contains a 48-byte RAM to store configuration data for the passive target and
card emulation mode.
2.2.17
P2RAM
The P2RAM stores information on wafer number, die position, device subversion, and I2C
address. The P2RAM is programmed during production.



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