Figure 9. Current monitor simplified circuit

IMON_5 = IOUT_5 x AI_5

IMON_12 = IOUT_12 x AI_12

IMON_SEL

IMON_5/12

STEF512SRI

CMON

RMON

The current monitoring circuit is also equipped with an internal clamp that limits the voltage on the pin at a static

value of 1.8 V. Bypassing the pin to GND with a minimum CMON of 1 nF is recommended as it avoids voltage

spikes during fast output current transition.

6.6

Thermal shutdown

If the device temperature exceeds the thermal threshold, typically 165 °C, the thermal shutdown circuitry turns

the power MOSFET off, thus disconnecting the load. The power MOSFET remains in an off-state until the die

temperature drops below the hysteresis value. Once this happens, the internal auto-retry circuit attempts to reset

the device.

The device is also equipped with a differential thermal protection that avoids damage in case of fast thermal

gradients inside the chip. When the differential thermal protection is activated, both channels are switched off.

This protection works in auto-retry mode without soft-start phase.

6.7

Reverse current blocking feature on the 5 V channel

The 5 V eFuse contains a second power transistor (ISOFET) connected in a back-to-back configuration with the

main one, to prevent significant current flowing back from the 5 V output into the 5 V input, in case of input short

to ground, brown-out, or a deep input voltage glitch. The simplified structure is shown in Figure 10. The ISOFET

is controlled by the UVLO circuit and by a reverse comparator, which continuously monitors the voltage difference

between the VIN_5 and VOUT_5.

As soon as the reverse comparator detects a significant negative voltage across the 5 V eFuse (typically 50 mV),

the M2 transistor is immediately turned off. M2 can be turned back on only if the voltage drop across the eFuse

has become zero (no negative current). However, in case of slow VIN_5 decay, the VOUT_5 voltage follows the

VIN_5 because of the output capacitor being discharged through the eFuse into the VIN_5, hence no significant

negative voltage is generated across the eFuse. In that case the UVLO circuit serves as a “stop loss” feature,

that is, the information from the reverse comparator is overridden by the VIN_5 undervoltage lockout and the M2

is forced to turn off. As soon as the UVLO threshold has been reached again, the eFuse restarts with normal

soft-start cycle.

Figure 10. 5 V reverse current protection block diagram

STEF512SRI

Thermal shutdown

DS14138 - Rev 1

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