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7LVC841APWDH bảng dữ liệu(PDF) 5 Page - NXP Semiconductors |
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7LVC841APWDH bảng dữ liệu(HTML) 5 Page - NXP Semiconductors |
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5 / 10 page ![]() Philips Semiconductors Product specification 74LVC841A 10-bit transparent latch with 5-volt tolerant inputs/outputs (3-State) 1998 Jun 17 5 DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40 °C to +85°C UNIT MIN TYP1 MAX VIH HIGH level Input voltage VCC = 1.2V VCC V VIH HIGH level In ut voltage VCC = 2.7 to 3.6V 2.0 V VIL LOW level Input voltage VCC = 1.2V GND V VIL LOW level In ut voltage VCC = 2.7 to 3.6V 0.8 V VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC*0.5 VOH HIGH level output voltage VCC = 3.0V; VI = VIH or VIL; IO = –100µA VCC*0.2 VCC V VOH HIGH level out ut voltage VCC = 3.0V; VI = VIH or VIL; IO = –18mA VCC*0.6 V VCC = 3.0V; VI = VIH or VIL; IO = –24mA VCC*1.0 VCC = 2.7V; VI = VIH or VIL; IO = 12mA 0.40 VOL LOW level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100µA GND 0.20 V VCC = 3.0V; VI = VIH or VIL; IO = 24mA 0.55 II Input leakage current VCC =3 6V; VI = 5 5V or GND "01 "5 µA II In ut leakage current VCC = 3.6V; VI = 5.5V or GND "0.1 "5 µA IOZ 3-State output OFF-state current VCC = 3.6V; VI = VIH or VIL; VO = VCC or GND 0.1 "5 µA ICC Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 0.1 10 µA ∆ICC Additional quiescent supply current per input pin VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 5 500 µA NOTE: 1 All typical values are at VCC = 3.3V and Tamb = 25°C. AC CHARACTERISTICS GND = 0 V; tr = tf v 2.5 ns; CL = 50 pF; RL = 500W; Tamb = –40_C to +85_C LIMITS SYMBOL PARAMETER WAVEFORM VCC = 3.3V ±0.3V VCC = 2.7V UNIT MIN TYP1 MAX MIN MAX tPHL/tPLH Propagation delay Dn to Qn Figures 1, 5 1.5 4.5 6.7 1.5 7.5 ns tPHL/tPLH Propagation delay LE to Qn Figures 2, 5 1.5 4.9 7.6 1.5 8.6 ns tPZH/tPZL 3-state output enable time OE to Qn Figures 3, 5 1.5 5.4 7.9 1.5 8.9 ns tPHZ/tPLZ 3-state output disable time OE to Qn Figures 3, 5 1.5 3.8 5.9 1.5 6.9 ns tw LE pulse width, HIGH Figure 4 2.0 0.7 – 2.0 ns tsu Set-up time Dn to LE Figure 4 2.0 0.5 – 2.0 ns th Hold time Dn to LE Figure 4 1.0 –0.5 – 1.0 ns NOTE: 1 All typical values are at VCC = 3.3V and Tamb = 25°C. |
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