7LVC646APWDH datasheet(3/16 Pages) PHILIPS

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Philips Semiconductors

Product specification

74LVC646A

Octal bus transceiver/register (3-State)

1998 Jul 29

PIN CONFIGURATION

SV00766

CP AB

S AB

DIR

A 0

A 1

A 2

A 3

A 4

A 5

A 6

A 7

GND

V CC

CP BA

S BA

B 0

B 1

B 2

B 3

B 4

B 5

B 6

B 7

PIN DESCRIPTION

PIN NUMBER

SYMBOL

FUNCTION

CPAB

‘A’ to ‘B’ clock input

(LOW-to-HIGH, edge-triggered)

SAB

Select ‘A’ to ‘B’ source input

DIR

Direction control input

4, 5, 6, 7, 8,

9, 10, 11

A0 to A7

‘A’ data inputs/outputs

GND

Ground (0V)

20, 19, 18, 17,

16, 15, 14, 13

B0 to B7

‘B’ data inputs/outputs

Output enable input (active LOW)

SBA

Select ‘B’ to ‘A’ source input

CPBA

‘B’ to ‘A’ clock input

(LOW-to-HIGH, edge-triggered)

VCC

Positive supply voltage

FUNCTION TABLE

INPUTS

DATA I/O *

FUNCTION

DIR

CPAB

CPBA

SAB

SBA

A0 to A7

B0 to B7

FUNCTION

↑

input

un *

input

store A, B unspecified *

store B, A unspecified *

↑

H or L

↑

H or L

input

store A and B data,

isolation hold storage

H or L

output

input

real-time B data to A bus

stored B data to A bus

H or L

input

output

real-time A data to B bus

stored A data to B bus

The data output functions may be enabled or disabled by

various signals at the OE and DIR inputs. Data input

functions are always enabled, i.e., data at the bus inputs will

be stored on every LOW-to-HIGH transition on the clock

inputs.

= unspecified

= HIGH voltage level

= LOW voltage level

= Don’t care

↑

= LOW-to-HIGH level transition

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