7LVC374APWDH datasheet(7/12 Pages) PHILIPS

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Philips Semiconductors

Product specification

74LVC374A

Octal D-type flip-flop with 5-volt tolerant

inputs/outputs; positive edge-trigger (3-State)

1998 Jul 29

AC WAVEFORMS

VM = 1.5V at VCC w 2.7V; VM = 0.5 VCC at VCC t 2.7V.

VOL and VOH are the typical output voltage drop that occur with the

output load.

VX = VOL + 0.3V at VCC w 2.7V; VX = VOL + 0.1 VCC at VCC t 2.7V

VY = VOH –0.3V at VCC w 2.7V; VY = VOH – 0.1 VCC at VCC t 2.7V

tPLH

CP INPUT

Qn OUTPUT

GND

VOH

VOL

SA00394

tPHL

1/fmax

Waveform 1. Clock (CP) to output (Qn) propagation delays, the

clock pulse width, output transition times and the maximum

clock pulse frequency.

SW00107

GND

INPUT

GND

VOH

OUTPUT

VOL

INPUT

tsu

NOTE: The shaded areas indicate when the input is permitted to change

for predictable output performance.

Waveform 2. Data setup and hold times for the Dn input to the

CP input.

tPLZ

tPZL

nOE INPUT

GND

VCC

Qn OUTPUT

LOW-to-OFF

OFF-to-LOW

VOL

VOH

Qn OUTPUT

HIGH-to-OFF

OFF-to-HIGH

GND

outputs

enabled

outputs

enabled

outputs

disabled

tPHZ

tPZH

SW00207

Waveform 3. 3-State enable and disable times.

TEST CIRCUIT

PULSE

GENERATOR

D.U.T.

50pF

2 x VCC

Open

GND

500

Ω

500

Ω

VCC

t 2.7V

VCC

2.7V – 3.6V

2.7V

Test

GND

tPLZ/tPZL

2 x VCC

tPHZ/tPZH

tPLH/tPHL

Open

SY00003

VCC

Waveform 4. Load circuitry for switching times.

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