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HC705JJ7GRS/D bảng dữ liệu(PDF) 216 Page - NXP Semiconductors

tên linh kiện HC705JJ7GRS/D
Giải thích chi tiết về linh kiện  Low-Cost, HC05 Core MCU in 20-Pin Package (MC68HC705JJ7) or 28-Pin Package (MC68HC705JP7)
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Electrical Specifications
General Release Specification
MC68HC705JJ7/MC68HC705JP7 — Rev. 3.0
Electrical Specifications
15.14 PEPROM and EPROM Programming Characteristics
NOTE:
To program the EPROM/OTPROM, MOR or EPMSEC bits, the voltage
on VDD must be greater than 4.5 volts.
15.15 SIOP Timing (VDD = 5.0 Vdc)
Characteristic
Symbol
Min
Typ
Max
Unit
PEPROM Programming Voltage (IRQ/VPP)VPP
16.0
16.5
17.0
V
PEPROM Programming Current (IRQ/VPP)IPP
3.0
5.0
mA
PEPROM Programming Time per Bit
tEPGM
4.0
ms
EPROM/MOR Programming Voltage (IRQ/VPP)VPP
16.0
16.5
17.0
V
EPROM/MOR Programming Current (IRQ/VPP)IPP
3.0
5.0
mA
EPROM Programming Time per Byte
tEPGM
4.0
ms
MOR Programming Time
tMPGM
10.0
ms
NOTE:
+4.5
≤ V
DD ≤ +5.5 V, VSS = 0 V, TL ≤ TA ≤ TH, unless otherwise noted
Characteristic
Symbol
Min
Typ
Max
Unit
Frequency of Operation
Master
Slave
fSIOP(M)
fSIOP(S)
0.25 x fOP
DC
0.25 x fOP
0.25 x fOP
1050
kHz
Cycle Time
Master
Slave
tSCK(M)
tSCK(M)
4.0 x tCYC
4.0 x tCYC
4.0 x tCYC
3.8
µs
Clock (SCK) Low Time (fOP = 4.2 MHz)
tSCKL
466
ns
SDO Data Valid Time
tV
200
ns
SDO Hold Time
tHO
0—
ns
SDI Setup Time
tS
100
ns
SDI Hold Time
tH
100
ns
NOTE:
1.
+4.5
≤ V
DD ≤ +5.5 V, VSS = 0 V, TL ≤ TA ≤ TH, unless otherwise noted
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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