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68HC08KL8 bảng dữ liệu(PDF) 65 Page - NXP Semiconductors |
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68HC08KL8 bảng dữ liệu(HTML) 65 Page - NXP Semiconductors |
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65 / 256 page  Central Processor Unit (CPU) Arithmetic/Logic Unit (ALU) MC68HC08KL8 — Rev. 2.0 General Release Specification Central Processor Unit (CPU) 6.5 Arithmetic/Logic Unit (ALU) The ALU performs the arithmetic and logic operations defined by the instruction set. Refer to the CPU08 Reference Manual (Motorola document number CPU08RM/AD) for a description of the instructions and addressing modes and more details about the CPU’s architecture. 6.6 Instruction Set Summary Table 6-1 provides a summary of the M68HC08 instruction set. Table 6-1. Instruction Set Summary Source Form Operation Description Effect on CCR VH I N Z C ADC # opr ADC opr ADC opr ADC opr,X ADC opr,X ADC ,X ADC opr,SP ADC opr,SP Add with Carry A ← (A) + (M) + (C) ¤¤ – ¤¤¤ IMM DIR EXT IX2 IX1 IX SP1 SP2 A9 B9 C9 D9 E9 F9 9EE9 9ED9 ii dd hh ll ee ff ff ff ee ff 2 3 4 4 3 2 4 5 ADD # opr ADD opr ADD opr ADD opr,X ADD opr,X ADD ,X ADD opr,SP ADD opr,SP Add without Carry A ← (A) + (M) ¤¤ – ¤¤¤ IMM DIR EXT IX2 IX1 IX SP1 SP2 AB BB CB DB EB FB 9EEB 9EDB ii dd hh ll ee ff ff ff ee ff 2 3 4 4 3 2 4 5 AIS # opr Add Immediate Value (Signed) to SP SP ← (SP) + (16 « M) – – – – – – IMM A7 ii 2 AIX # opr Add Immediate Value (Signed) to H:X H:X ← (H:X) + (16 « M) – – – – – – IMM AF ii 2 AND # opr AND opr AND opr AND opr,X AND opr,X AND ,X AND opr,SP AND opr,SP Logical AND A ← (A) & (M) 0 – – ¤¤ – IMM DIR EXT IX2 IX1 IX SP1 SP2 A4 B4 C4 D4 E4 F4 9EE4 9ED4 ii dd hh ll ee ff ff ff ee ff 2 3 4 4 3 2 4 5 ASL opr ASLA ASLX ASL opr,X ASL ,X ASL opr,SP Arithmetic Shift Left (Same as LSL) ¤ –– ¤¤¤ DIR INH INH IX1 IX SP1 38 48 58 68 78 9E68 dd ff ff 4 1 1 4 3 5 C b0 b7 0 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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