74LV241DB datasheet(7/12 Pages) PHILIPS

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Philips Semiconductors

Product specification

74LV241

Octal buffer/line driver (3-State)

1998 May 20

AC WAVEFORMS (Continued)

VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5 V × VCC at VCC < 2.7 V

VX = VOL + 0.3 V at VCC ≥ 2.7 V; VX = VOL + 0.1 V × VCC at VCC <

2.7 V

VY = VOH – 0.3 V at VCC ≥ 2.7V; VY = VOH – 0.1 × VCC at VCC < 2.7

VOL and VOH are the typical output voltage drop that occur with the

output load.

SV00619

outputs

disabled

outputs

enabled

outputs

enabled

tPHZ

tPZH

tPZL

tPLZ

HIGH-to-OFF

OFF-to-HIGH

LOW-to-OFF

OFF-to-LOW

2OE INPUT

VOL

VOH

GND

VCC

OUTPUT

Figure 3. 3-State enable and disable times for input 2OE.

TEST CIRCUIT

SWITCH POSITION

PULSE

GENERATOR

D.U.T.

VCC

RL = 1k

Test Circuit for switching times

Open

GND

DEFINITIONS

VCC

< 2.7V

VCC

TEST

tPLH/tPHL

Open

RL = Load resistor

CL = Load capacitance includes jig and probe capacitance

RT = Termination resistance should be equal to ZOUT of pulse generators.

< VCC

tPLZ/tPZL

2.7V

2.7–3.6V

tPHZ/tPZH

GND

50pF

SV00895

RL = 1k

2 * VCC

Figure 4. Load circuitry for switching times.

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