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PI74FCT652T bảng dữ liệu(PDF) 6 Page - Pericom Semiconductor Corporation

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PS2022A 03/11/96
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PI74FCT646/648/651/652T
(25
Ω
Ω
Ω
Ω
Ω Series) P174FCT2646T/2652T
OCTAL REGISTERED TRANSCEIVERS
PI74FCT646/2646T Switching Characteristics over Operating Range
646T/2646T
646AT/2646AT
646CT
646DT
Com.
Com.
Com.
Com.
Parameters
Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Min
Max
Unit
tPLH
Propagation Delay
CL = 50 pF
2.0
7.5
2.0
6.3
1.5
5.4
1.5
4.8
ns
tPHL
Bus to Bus
RL = 500
Ω
tPZH
Output Enable Time
2.0
14.0
2.0
9.8
1.5
7.8
1.5
7.3
ns
tPZL
G, DIR to Bus
tPHZ
Output Disable Time(3)
2.0
9.0
2.0
6.3
1.5
6.3
1.5
6.3
ns
tPLZ
G, DIR to Bus
tPLH
Propagation Delay
2.0
9.0
2.0
6.3
1.5
5.7
1.5
5.2
ns
tPHL
Clock to Bus
tPLH
Propagation Delay
2.0
9.5
2.0
7.7
1.5
6.2
1.5
5.8
ns
tPHL
SBA or SAB to Bus
tSU
Setup Time HIGH or
4.0
—
2.0
—
2.0
—
2.0
—
ns
LOW, BUS to Clock
tH
Hold Time HIGH or
2.0
—
1.5
—
1.5
—
1.5
—
ns
LOW, Bus to Clock
tW
Clock Pulse Width(3)
6.0
—
5.0
—
5.0
—
5.0
—
ns
HIGH or LOW
PI74FCT648T Switching Characteristics over Operating Range
648T
648AT
648CT
648DT
Com.
Com.
Com.
Com.
Parameters
Description
Conditions(1)
Min
Max
Min
Max
Min
Max
Min
Max
Unit
tPLH
Propagation Delay
CL = 50 pF
2.0
7.5
2.0
6.3
1.5
5.4
1.5
4.8
ns
tPHL
Bus to Bus
RL = 500
Ω
tPZH
Output Enable Time
2.0
14.0
2.0
9.8
1.5
7.8
1.5
7.3
ns
tPZL
G, DIR to Bus
tPHZ
Output Disable Time(3)
2.0
9.0
2.0
6.3
1.5
6.3
1.5
6.3
ns
tPLZ
G, DIR to Bus
tPLH
Propagation Delay
2.0
9.0
2.0
6.3
1.5
5.7
1.5
5.2
ns
tPHL
Clock to Bus
tPLH
Propagation Delay
2.0
9.5
2.0
7.7
1.5
6.2
1.5
5.8
ns
tPHL
SBA or SAB to Bus
tSU
Setup Time HIGH or
4.0
—
2.0
—
2.0
—
2.0
—
ns
LOW, BUS to Clock
tH
Hold Time HIGH or
2.0
—
1.5
—
1.5
—
1.5
—
ns
LOW, Bus to Clock
tW
Clock Pulse Width(3)
6.0
—
5.0
—
5.0
—
5.0
—
ns
HIGH or LOW
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter guaranteed but not production tested.



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