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74HC4060PW bảng dữ liệu(PDF) 12 Page - NXP Semiconductors |
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74HC4060PW bảng dữ liệu(HTML) 12 Page - NXP Semiconductors |
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12 / 12 page ![]() December 1990 12 Philips Semiconductors Product specification 14-stage binary ripple counter with oscillator 74HC/HCT4060 Fig.11 External components connection for a crystal oscillator. TYPICAL CRYSTAL OSCILLATOR In Fig.11, R2 is the power limiting resistor. For starting and maintaining oscillation a minimum transconductance is necessary, so R2 should not be too large. A practical value for R2 is 2.2 k Ω. AC WAVEFORMS Fig.12 Waveforms showing the clock (RS) to output (Q3) propagation delays, the clock pulse width, the output transition times and the maximum clock frequency. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. Fig.13 Waveforms showing the master reset (MR) pulse width, the master reset to output (Qn) propagation delays and the master reset to clock (RS) removal time. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. PACKAGE OUTLINES See “74HC/HCT/HCU/HCMOS Logic Package Outlines”. Fig.14 Waveforms showing the output (Qn) to Qn+1 propagation delays. (1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V. |
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