a delay of about 200 μs then the internal reference and hence VOUT rises with a slope controlled by an external

capacitor connected to the SS/TR pin.

Leaving the SS/TR pin un-connected provides the fastest startup ramp with 150 µs typically. A capacitor

connected from SS/TR to GND is charged with 2.5 µA by an internal current source during soft start until it

reaches the reference voltage of 0.6 V. The capacitance required to set a certain ramp-time (tramp) therefore is:

(6)

If the device is set to shutdown (EN = GND), undervoltage lockout, or thermal shutdown, an internal resistor

pulls the SS/TR pin to GND to ensure a proper low level. Returning from those states causes a new start-up

sequence.

A voltage applied at SS/TR can be used to track a master voltage. The output voltage follows this voltage in both

directions up and down in forced PWM mode. In PFM mode, the output voltage decreases based on the load

current. The SS/TR pin must not be connected to the SS/TR pin of other devices. An external voltage applied

on SS/TR is internally clamped to the feedback voltage (0.6 V). TI recommends to set the target for the external

voltage on SS/TR slightly above the feedback voltage. Given the tolerances of the resistor divider R5 and R6 on

SS/TR, this ensures the device "switches" to the internal reference voltage when the power-up sequencing is

finished. See Figure 10-58.

TPS62810-Q1, TPS62811-Q1, TPS62812-Q1, TPS62813-Q1

SLVSDU1J – AUGUST 2018 – REVISED MARCH 2023

www.ti.com

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