AM68AX datasheet(228/251 Pages) TI

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Table 7-90 represents Timers timing conditions.

Table 7-90. Timers Timing Conditions

PARAMETER

DESCRIPTION

MODE

MIN

MAX

UNIT

INPUT CONDITIONS

SRI

Input slew rate

CAPTURE

0.5

V/ns

OUTPUT CONDITIONS

Output load capacitance

PWM

Section 7.10.5.22.1, Section 7.10.5.22.2 and Figure 7-109 present timings and switching characteristics of the

Timers.

7.10.5.22.1 Timing Requirements for Timers

NO.

PARAMETER

DESCRIPTION

MODE

MIN

MAX

UNIT

tw(TINPH)

Pulse duration, high

CAPTURE

2.5 +

(1)

tw(TINPL)

Pulse duration, low

CAPTURE

2.5 +

(1)

P = functional clock period in ns.

7.10.5.22.2 Switching Characteristics for Timers

NO.

PARAMETER

DESCRIPTION

MODE

MIN

MAX

UNIT

tw(TOUTH)

Pulse duration, high

PWM

-2.5 +

(1)

tw(TOUTL)

Pulse duration, low

PWM

-2.5 +

(1)

P = functional clock period in ns.

TIMER_IOx (inputs)

TIMER_01

TIMER_IOx (outputs)

Figure 7-109. Timer Timing

For more information, see Timers section in Peripherals chapter in the device TRM.

7.10.5.23 UART

For more details about features and additional description information on the device Universal Asynchronous

Receiver Transmitter, see the corresponding sections within , Section 6.3 and Detailed Description.

Table 7-91 represents UART timing conditions.

Table 7-91. UART Timing Conditions

PARAMETER

DESCRIPTION

MIN

MAX

UNIT

INPUT CONDITIONS

SRI

Input slew rate

0.5

V/ns

OUTPUT CONDITIONS

AM68A

SPRSP91 – FEBRUARY 2023

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