STR710FZ1 datasheet(54/74 Pages) STMICROELECTRONICS

54 / 74 page

Electrical parameters

STR71xF

54/74

RSTIN Pin

The RSTIN pin input driver is CMOS. A permanent pull-up is present which is the same as

as RPU (seeTable 27 on page 49)

Subject to general operating conditions for V33 and TA unless otherwise specified.

Notes:

Data based on characterization results, not tested in production.

2) Data guaranteed by design, not tested in production.

Figure 24. Recommended RSTIN pin protection.1)

Notes:

The RPU pull-up equivalent resistor is based on a resistive transistor (corresponding IPU current

characteristics described in Figure 18).

The reset network protects the device against parasitic resets.

The user must ensure that the level on the RSTIN pin can go below the VIL(RSTINn) max. level specified in

Table 29. Otherwise the reset will not be taken into account internally.

2.3.6

TIM timer characteristics

Subject to general operating conditions for V33, fMCLK, and TA unless otherwise

specified.

Refer to Section 2.3.5: I/O port pin characteristics on page 49 for more details on

the input/output alternate function characteristics (output compare, input capture,

external clock, PWM output...).

Table 29.

RESET pin characteristics

Symbol

Parameter

Conditions

Min

Typ 1)

Max

Unit

VIL(RSTINn) RSTIN Input low level voltage 1)

0.8

VIH(RSTINn) RSTIN Input high level voltage 1)

VF(RSTINn) RSTIN Input filtered pulse2)

500

VNF(RSTINn) RSTIN Input not filtered pulse2)

1.2

µs

0.01

µF

V33

0.01

µF

EXTERNAL

RESET

CIRCUIT

4.7k

Ω

Required

Recommended

STR7X

Filter

RPU

V33

INTERNAL RESET

V33

RSTIN

Table 30.

TIM characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tw(ICAP)in

Input capture pulse time

tCK_TIM

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