74F604 datasheet(6/7 Pages) PHILIPS

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Philips Semiconductors

Product specification

74F604

Dual octal latch (3-State)

1990 Mar 01

AC SETUP REQUIREMENTS

SYMBOL

PARAMETER

TEST

LIMITS

UNIT

SYMBOL

PARAMETER

TEST

CONDITION

VCC = +5V

Tamb = +25°C

CL = 50pF, RL = 500Ω

VCC = +5V ± 10%

Tamb = 0°C to +70°C

CL = 50pF, RL = 500Ω

UNIT

MIN

TYP

MAX

MIN

MAX

ts(H)

ts(L)

Setup time, High or Low

An, Bn to LE

Waveform 3

1.0

2.0

3.0

th(H)

th(L)

Hold time, High or Low

An, Bn to LE

Waveform 3

1.0

1.5

tW(L)

LE Pulse width, Low

Waveform 3

5.0

6.0

AC WAVEFORMS

For all waveforms, VM = 1.5V.

The shaded areas indicate when the input is permitted to change for predictable output performance.

tPLH

tPHL

SELECT A/B

SF01119

Waveform 1. Propagation Delay, SELECT A/B To Output

(B latched data=Low. LE=H)

tPLH

tPHL

SELECT A/B

SF01120

Waveform 2. Propagation Delay, SELECT A/B to Output

(A latched data=Low. LE=H)

SF01121

An, Bn

ts(H)

ts(L)

th(L)

th(H)

tw(L)

Waveform 3. Data Setup and Hold Times,

Latch Enable Pulse Width

tPHZ

tPZH

VOH -0.3V

SF01122

Waveform 4. 3-State Output Enable Time to High Level and

Output Disable Time from High Level

tPLZ

tPZL

VOL +0.3V

SF01123

Waveform 5. 3-State Output Enable Time to Low Level and

Output Disable Time from Low Level

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