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TDA7540B bảng dữ liệu(PDF) 33 Page - STMicroelectronics |
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TDA7540B bảng dữ liệu(HTML) 33 Page - STMicroelectronics |
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33 / 75 page ![]() TDA7540B Functional description 33/75 Inlock detector Switching the chargepump in low current mode can be done either via software or automatically by the inlock detector, by setting bit LDENA to "1". After reaching a phase difference about lower than 40nsec the chargepump is forced in low current mode. A new PLL divider alternation by I2C-Bus will switch the chargepump in the high current mode. Low noise CMOS op-amp An internal voltage divider at pin VREF2 connects the positive input of the low noise op- amp. The charge pump output connects the negative input. This internal amplifier in cooperation with external components can provide an active filter. The negative input is switchable to three input pins, to increase the flexibility in application. This feature allows two separate active filters for different applications. While the high current mode is activated LPHC output is switched on. 4.4.2 IF counter block The aim of IF counter is to measure the intermediate frequency of the tuner for AM and FM mode. The input signal for FM and AM upconversion is the same 10.7MHz IF level after limiter. AM 450KHz signal is coming from narrow filtered IF2 before demodulation. A switch controlled by IF counter mode (IFCM) is choosing the input signal for IF counter. The grade of integration is adjustable by eight different measuring cycle times. The tolerance of the accepted count value is adjustable, to reach an optimum compromise for search speed and precision of the evaluation. The IF-counter mode The IF counter works in 3 modes controlled by IFCM register. Sampling timer A sampling timer generates the gate signal for the main counter. The basically sampling time are in FM mode 6.25kHz (tTIM=160µs) and in AM mode 1kHz (tTIM=1ms). This is followed by an asynchronous divider to generate several sampling times. Intermediate frequency main counter This counter is a 11 - 21-bit synchronous autoreload down counter. Five bits (CF) are programmable to have the possibility for an adjust to the centre frequency of the IF-filter. The counter length is automatic adjusted to the chosen sampling time and the counter mode (FM, AM-UPC, AM). At the start the counter will be loaded with a defined value which is an equivalent to the divider value (tSample xfIF). If a correct frequency is applied to the IF counter frequency input at the end of the sampling time the main counter is changing its state from 0h to 1FFFFFh. |
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