Philips Semiconductors

Product specification

74F113

Dual J-K negative edge-triggered flip-flops

without reset

1996 Mar 14

5

AC WAVEFORMS

The shaded areas indicate when the input is permitted to change for predictable output performance.

tPLH

VM

VM

CPn

VM

VM

VM

VM

VM

VM

Jn, Kn

Qn

VM

tw(H)

1/fmax

tsu(L)

th(L) = 0

VM

VM

tPLH

Qn

tw(L)

tPHL

tPHL

tsu(H)

th(H) = 0

SF00144

Kn

Jn

Jn

Kn

Waveform 1.

Propagation Delay for Data to Output, Data Setup Time and Hold Times, and Clock Width,

and Maximum Clock Frequency

VM

CPn

Qn

VM

VM

Qn

tPHL

tPLH

SDn

VM

VM

tw(L)

trec

Jn, Kn

SF00145

Waveform 2.

Propagation Delay for Set to Output, Set Pulse Width, and Recovery Time for Set to Clock