EM78P813

8-bit OTP Micro-controller

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* This specification is subject to change without notice.

16

2004/8/19

(V1.6)

R4 RAM select for common Registers R20~R3F , UART control

PAGE0

7

6

5

4

3

2

1

0

RBS1

RBS0

RSR5

RSR4

RSR3

RSR2

RSR1

RSR0

Bit 0 ~ Bit 5 (RSR0 ~ RSR5) : Indirect addressing for common registers R20 ~ R3F

RSR bits are used to select up to 32 registers (R20 to R3F) in the indirect addressing mode.

Bit 6 ~ Bit 7 (RB0 ~ RB1) : Bank selection bits for common registers R20 ~ R3F

These selection bits are used to determine which bank is activated among the 4 banks (RBS2 is in R4 PAGE3 Bit7)

for 32 register (R20 to R3F)..

R4 PAGE1 Undefined Register

R4 page1 is undefined register, this is not allowed to use.

PAGE2 Undefined Register

7

6

5

4

3

2

1

0

X

X

X

X

X

X

0

0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

Bit 0 ~ Bit 1 : Undefined registers, please clear these two bits to 0.

Bit 2 ~ Bit 7 : Undefined registers, these bits are not allowed to use.

R4 PAGE3 Undefined Register

R4 page3 is undefined register, this is not allowed to use.

R5 Program page selection , CNT CLK & scale setting , CNT1 data(L)

PAGE0 Program page

7

6

5

4

3

2

1

0

X

PS6

PS5

PS4

PS3

PS2

PS1

PS0

X

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

Bit 0 ~ Bit 6 (PS0 ~ PS6) : Program page selection bits

PS6

PS5

PS4

PS3

PS2

PS1

PS0 Program memory page (Address)

0

0

0

0

0

0

0

Page 0

0

0

0

0

0

0

1

Page 1

0

0

0

0

0

1

0

Page 2

0

0

0

0

0

1

1

Page 3

:

:

:

:

:

:

:

:

:

:

:

:

1

1

1

1

1

1

0

Page 126

1

1

1

1

1

1

1

Page 127

User can use PAGE instruction to change page to maintain program page by user.

Bit 7 : Unused.

PAGE1 Counter1 Counter2 CLK and scale setting

7

6

5

4

3

2

1

0

CNT2S

C2P2

C2P1

C2P0

CNT1S

C1P2

C1P1

C1P0

Bit 0~Bit 2(C1P0~C1P2) : Counter1 scaling