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PCA9420 bảng dữ liệu(PDF) 30 Page - NXP Semiconductors |
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PCA9420 bảng dữ liệu(HTML) 30 Page - NXP Semiconductors |
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30 / 87 page ![]() NXP Semiconductors PCA9420 Power management IC for low-power microcontroller applications Bit Symbol Default value Type Function 7 RSVD 0 W/C Reserved bit 6 ICHG_DEAD_TIMER_INT 0 W/C Dead charge timer expiration Interrupt 0: The dead charge timer expiration has not happened since last time this bit was cleared 1: The dead charge timer expiration has happened since last time this bit was cleared For more details, see Figure 10 5 VIN_ILIM 0 W/C Input Current Limit Interrupt 0: no Input current limit has been triggered since the last time this bit is cleared; 1: input current limit event is triggered since last time this bit is cleared. 4 ICHG_FAST_TIMER 0 W/C Fast Charging Timer Expiration Interrupt 0: The fast charging timer expiration has not happened since the last time this bit was cleared. 1: The fast charging timer expiration has happened since the last time this bit was cleared. 3 ICHG_PREQ_TIMER 0 W/C Pre-qualification Charging Timer Expiration Interrupt 0: The pre-qual charging timer expiration has not happened since the last time this bit was cleared. 1: The pre-qual charging timer expiration has happened since the last time this bit was cleared. 2 BATTERY_DETECTION 0 W/C Battery presence Interrupt 0: The VBAT_DET_OK bit has not changed since the last time this bit was cleared. 1: The VBAT_DET_OK bit has changed since the last time this bit was cleared. 1 VBAT 0 W/C Battery Interrupt 0: The VBAT_OK bit has not changed since the last time this bit was cleared. 1: The VBAT_OK bit has changed since the last time this bit was cleared. 0 CHG_OK 0 W/C Charger Status Interrupt 0: The CHG_OK bit has not changed since the last time this bit was cleared. 1: The CHG_OK bit has changed since the last time this bit was cleared Table 13. Sub_INT1 register bit description 9.5.6 Sub level interrupt_1 mask (Sub_INT1_Mask, address 05h) This is a READ AND WRITE register. Bit Symbol Default value Type Function 7 RSVD 0 R/W Reserved bit Table 14. Sub_INT1_Mask register bit description PCA9420 All information provided in this document is subject to legal disclaimers. © 2022 NXP B.V. All rights reserved. Product data sheet Rev. 4.0 — 28 November 2022 30 / 87 |
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