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DRA821U2...ALM bảng dữ liệu(PDF) 109 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  DRA821 Jacinto™ Processors
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7.9.2 Power Supply Sequencing
This section describes power supply sequencing required to ensure proper device operation. The power supply
names described in this section comprise a superset of a family of compatible devices. Some members of this
family will not include a subset of these power supplies and their associated device modules.
7.9.2.1 Power Supply Slew Rate Requirement
To maintain the safe operating range of the internal ESD protection devices, TI recommends limiting the
maximum slew rate of supplies to be less than 100 mV/µs. For instance, as shown in Figure 7-2, TI recommends
having the supply ramp slew for a 1.8-V supply of more than 18 μs.
Figure 7-2 describes the Power Supply Slew Rate Requirement in the device.
t
slew rate < 100 mV/ s
slew > (supply value) / (
)
or
supply value x 10 µs
µ
100 mV/µs
Supply value
J7VC_ELCH_03
Figure 7-2. Power Supply Slew and Slew Rate
www.ti.com
DRA821U-Q1
SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022
Copyright © 2022 Texas Instruments Incorporated
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