SIP32433

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Vishay Siliconix

E22-0335. A, 15-Aug-2022

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Document Number: 63175

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The resistors must be sized large enough to minimize the constant leakage from supply to ground through the resistor divider

network. At the same time, keep the current through the resistor network sufficiently larger than the leakage current on the EN

/ UVLO pin to minimize the error in the resistor divider ratio.

Where VUVPR is 1.25 V.

UVLO turn off delay (TOFF_DLY) is typically 550 μs and turn on delay TON_DLY is typically 500 μs.

Fig. 34 - Switching Times

OVER-VOLTAGE PROTECTION (OVP)

The SIP32433A and SIP32433B implement overvoltage protection (OVP) on both the VIN and OVP pins to protect the output

load in the event of an input over-voltage. When the input exceeds the over-voltage protection thresholds VOVP(R) or the INOVP,

which is typically 24 V, the device turns off the output within tOVP, while the PGD asserts in the meantime. As long as an

over-voltage condition is present on the input, the device stays disabled and the output will be turned off. Over-voltage is a

non-latchable fault. Once the input voltage returns to the normal operating range, the device attempts to start up normally.

Fig. 35

OVP voltage divider resistors total resistance should not be over 2.5 M

.

R

EN1 =

R

EN2 VIN - VUVPR



V

UVPR

---------------------------------------------------

VIN

VOUT

VUVPR

EN/UVLO

TON

VUVPF

TR

TON_DLY

TF

10 %

90 %

TOFF_DLY

IN

GND

OVP

R

OVP1

R

OVP2

Power

source

SIP32433

R

OVP1

R

OVP2

---------------- =

V

IN(OVP) - 1.2 V

1.2 V

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