Philips Semiconductors

Product specification

74ABT373A

Octal transparent latch (3-State)

1995 Feb 17

3

LOGIC SYMBOL

3

4

7

8

13

14

18

17

D0 D1 D2 D3 D4 D5 D6 D7

Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7

2

5

6

9

12 15 16

19

1

11

OE

E

SA00060

FUNCTION TABLE

INPUTS

INTERNAL

OUTPUTS

OPERATING

OE

E

Dn

REGISTER

Q0 – Q7

OPERATING

MODE

L

L

H

H

L

H

L

H

L

H

Enable and read

register

L

L

↓

↓

l

h

L

H

L

H

Latch and read

register

L

L

X

NC

NC

Hold

H

H

L

H

X

Dn

NC

Dn

Z

Z

Disable outputs

H = High voltage level

h

= High voltage level one set-up time prior to the High-to-Low E

transition

L

= Low voltage level

l

= Low voltage level one set-up time prior to the High-to-Low E

transition

NC= No change

X = Don’t care

Z = High impedance “off” state

↓ = High-to-Low E transition

LOGIC SYMBOL (IEEE/IEC)

11

32

4

5

7

6

89

C1

13

12

14

15

17

16

18

19

1

EN

1D

SA00061

LOGIC DIAGRAM

E

Q

D

D0

Q0

EQ

D

D1

EQ

D

D2

EQ

D

D3

EQ

D

D4

EQ

D

D5

EQ

D

D6

EQ

D

D7

Q1

Q2

Q3

Q4

Q5

Q6

Q7

E

OE

SA00062

3

4

7

8

13

14

17

18

11

1

2

5

6

9

12

15

16

19