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74HCT240D bảng dữ liệu(PDF) 1 Page - Toshiba Semiconductor |
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74HCT240D bảng dữ liệu(HTML) 1 Page - Toshiba Semiconductor |
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1 / 8 page ![]() 74HCT240D,74HCT244D 1 CMOS Digital Integrated Circuits Silicon Monolithic 74HCT240D,74HCT244D Start of commercial production 2020-07 1. Functional Description • Octal Bus Buffer 74HCT240D: INVERTED, 3-STATE OUTPUTS 74HCT244D: NON-INVERTED, 3-STATE OUTPUTS 2. General The 74HCT240D, and 74HCT244D are high speed CMOS OCTAL BUS BUFFERs fabricated with silicon gate C2MOS technology. They achieve the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. Their inputs are compatible with TTL, NMOS, and CMOS output voltage levels. The 74HCT240D is an inverting 3-state buffer having two active-low output enables. The 74HCT244D is non-inverting 3-state buffer the HCT244A has two active-low output enables. These devices are designed to be used with 3-state memory address drivers, etc. All inputs are equipped with protection circuits against static discharge or transient excess voltage. 3. Features (1) Wide operating temperature range: Topr = -40 to 125 � (Note 1) (2) High speed: tpd = 13 ns (typ.) at VCC = 5.5 V (3) Low power dissipation: ICC = 4.0 µA (max) at Ta = 25 � (4) Compatible with TTL outputs: VIL = 0.8 V(max) VIH = 2.0 V(min) (5) Wide interfacing ability: LSTTL, NMOS, CMOS (6) Balanced propagation delays: tPLH ≈ tPHL Note 1: Operating Range spec of Topr = -40 � to 125 � is applicable only for the products which manufactured after July 2020. 4. Packaging SOIC20 2020-11-17 Rev.3.0 ©2016-2020 Toshiba Electronic Devices & Storage Corporation |
Số phần tương tự - 74HCT240D |
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Mô tả tương tự - 74HCT240D |
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