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AS3682-EB2 bảng dữ liệu(PDF) 33 Page - ams AG

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AS3682-EB2 bảng dữ liệu(HTML) 33 Page - ams AG

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AS3682
austriamicrosystems
Data Sheet
Serial Interface
www.austriamicrosystems.com
Revision 2.21
33 - 43
11.9 Serial Interface
The AS3682 is controlled by serial interface pins DATA/P1 and CLK/P2.
11.9.1 Features
!
Fast Mode Capability (Maximum Clock Frequency is 400 kHz)
!
7-Bit Addressing Mode
!
4 x 8-Bit Read/Write Data Registers (Word Address 0x0 to 0x3)
!
Write Formats
- Single-Byte Write
- Page-Write
!
Read Formats
- Current-Address Read
- Random-Read
- Sequential-Read
!
Asynchronous Reset Input (Active 0)
!
No Internal System Clock
!
DATA/P1 Input Delay and CLK/P2 Spike Filtering by Integrated RC Components
11.9.2 Device Address Selection
The serial interface address of the AS3682 can be selected between two fixed settings. The address is selected by
connecting pin ADR to either GND or to V2_5 as shown in Table 34.
11.9.3 Data Transfer Formats
Definitions used in the serial data transfer format diagrams (Figures 19 to 23) are listed in Table 35.
Table 34. AS3682 Device Address Selection
ADR Connected To
Serial Interface Address
GND
40h
V2_5 (Max Voltage = 2.5V)
41h
Table 35. Serial Data Transfer Byte Definitions
Symbol
Definition
S
Start Condition after Stop
Sr
Repeated Start
DA
Device Address
WA
Word Address
A
Acknowledge
N
Not Acknowledge
P
Stop Condition
White Field
Slave as Receiver
Grey Field
Slave as Transmitter
WA++
Increment Word Address Internally



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