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AS1152

Data Sheet

Pin Assignments

7 Pinout and Packaging

Pin Assignments

Figure 16. AS1152 Pin Assignments (Top View)

Pin Descriptions

Table 4. AS1152 Pin Descriptions

Pin Number

Pin Name

Description

1EN

Driver Enable Input. Internally pulled down to GND.

When EN = high and ENn = low or open, the driver outputs are active. For other

combinations of EN and ENn, the outputs are disabled and in high impedance.

2IN1

LVTTL/LVCMOS Driver Input

3IN2

LVTTL/LVCMOS Driver Input

capacitors.

5GND

Ground

6IN3

LVTTL/LVCMOS Driver Input

7IN4

LVTTL/LVCMOS Driver Input

8ENn

Driver Enable Input. Internally pulled down to GND.

When EN = high and ENn = low or open, the driver outputs are active. For other

combinations of EN and ENn, the outputs are disabled and in high impedance.

9OUT4-

Inverting LVDS Driver Output

10

OUT4+

Noninverting LVDS Driver Output

11

OUT3+

Noninverting LVDS Driver Output

12

OUT3-

Inverting LVDS Driver Output

13

OUT2-

Inverting LVDS Driver Output

14

OUT2+

Noninverting LVDS Driver Output

15

OUT1+

Noninverting LVDS Driver Output

16

OUT1-

Inverting LVDS Driver Output

OUT1-

OUT1+

OUT2+

OUT2-

OUT3-

OUT3+

OUT4+

OUT4-

EN

IN1

IN2

GND

IN3

IN4

ENn

AS1152

TSSOP

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9