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DRV8461SPWPR bảng dữ liệu(PDF) 115 Page - Texas Instruments |
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DRV8461SPWPR bảng dữ liệu(HTML) 115 Page - Texas Instruments |
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115 / 117 page ![]() www.ti.com EXAMPLE BOARD LAYOUT (7.5) (1.1) TYP ( 0.2) TYP VIA 0.05 MAX AROUND 0.05 MIN AROUND 44X (1.45) 44X (0.4) 42X (0.635) (R0.05) TYP (3.8) (8) (5.2) NOTE 9 (14) NOTE 9 (1.1 TYP) PowerPAD TSSOP - 1.2 mm max height DDW0044E PLASTIC SMALL OUTLINE 4226764/A 05/2021 SYMM SYMM SEE DETAILS LAND PATTERN EXAMPLE SCALE:6X 1 22 23 44 METAL COVERED BY SOLDER MASK SOLDER MASK DEFINED PAD 45 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. 8. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers SLMA002 (www.ti.com/lit/slma002) and SLMA004 (www.ti.com/lit/slma004). 9. Size of metal pad may vary due to creepage requirement. TM METAL SOLDER MASK OPENING NON SOLDER MASK DEFINED SOLDER MASK DETAILS NOT TO SCALE OPENING SOLDER MASK METAL UNDER SOLDER MASK SOLDER MASK DEFINED |
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