DRV8461SPWPR datasheet(53/117 Pages) TI

tên linh kiện	DRV8461SPWPR

Giải thích chi tiết về linh kiện	DRV8461: 65 V, 3 A Stepper Motor Driver for High Efficiency and Noiseless Operation

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Figure 7-33. Quad-Level Input Pin Diagram

Figure 7-34 shows the input structure for STEP, DIR, MODE, SDI, SCLK, DECAY1 and nSLEEP pins.

Figure 7-34. Logic-Level Input Pin Diagram

The following diagram shows the input structure for the logic-level pin nSCS.

Figure 7-35. nSCS Input Pin Diagram

7.3.18 Spread Spectrum

Spread spectrum or frequency dithering is used to reduce the effect of EMI by converting a narrowband signal

into a wideband signal, which will spread the energy across multiple frequencies. Figure 7-36 illustrates how

manipulating the clock frequency over time has the effect of spreading the energy.

In the context of the DRV8461, the frequencies of the internal clock for digital circuits (10 MHz typical) and the

clock for charge pump (357 kHz typical) are manipulated to reduce the peak energy and is distributed to other

frequencies and their harmonics. This feature combined with output slew rate control minimizes the radiated

emissions from the device and helps pass strict EMI standards.

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DRV8461

SLOSE98 – DECEMBER 2022

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