AP43776Q

Document number: DS43207 Rev. 2 - 2

8 of 13

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November 2022

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AP43776Q

Functional Overview (continued)

MCU and OTP/MTP ROM

The AP43776Q has an MCU subsystem, which integrates an 8-bit 8051 processor, SRAM, and OTP ROM. The MCU subsystem is optimized for

user configurability of different topologies, support of different protocols, and low-power consumption at a low cost. With the embedded hardware

PHY transceivers offloading MCU processing, the AP43776Q can handle two channels of PD handshakes efficiently through an MCU

simultaneously, and be compliant with critical USB Power Delivery specifications.

An OTP ROM is provided to store PD, QC, and FCP protocol firmware, and an MTP ROM is provided for user configuration table. Either in-system

programming or offline socket programming are provided for the OTP ROM and MTP ROM.

ADC

The AP43776Q contains a 10-bit SAR (successive approximation register) ADC and multi-channel multiplexer for analog to digital conversions. All

GPIO inputs can be connected to the internal analog multiplex busses through a switch. With the ADC voltage reference, VREF, being set at 2V,

any input voltage, Vin, on the GPIO can be digitized into a 10-bit digital code proportional to Vin/VREF. The sampling rate of ADC is 100KHz, but

the firmware re-samples the ADC output by 1ms/time, and some longer de-glitch time is used to qualify the ADC output code. Meanwhile, ADC is

used to detect and monitor analog signals on the non-GPIO pins like CC1/CC2/VCONN and DP/DN, and then come out the associated OVP

protections.

GPIO Support

There are many GPIO pins that can be used to support customization features, like low-voltage battery, power de-rating, thermal power de-rating,

LED light indication, fault status, and so on. The GPIO pin can also be used for UART communication to support four USB Type-C ports, and

some GPIOs support current sources for external NTC temperature detection.