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LPC43S30 bảng dữ liệu(PDF) 96 Page - NXP Semiconductors |
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LPC43S30 bảng dữ liệu(HTML) 96 Page - NXP Semiconductors |
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96 / 156 page ![]() LPC43S50_S30_S20 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2020. All rights reserved. Product data sheet Rev. 1.3 — 20 January 2020 96 of 156 NXP Semiconductors LPC43S50/S30/S20 32-bit ARM Cortex-M4/M0 microcontroller 10.1 Power consumption Conditions: Tamb = 25 C; active mode entered executing code while(1){} from SRAM; M0-core in reset; internal pull-up resistors disabled; PLL1 enabled; IRC enabled; all peripherals disabled; all peripheral clocks disabled. Fig 11. Typical supply current versus regulator supply voltage VDD(REG)(3V3) in active mode Conditions: VDD(REG)(3V3) = 3.3 V, Active mode entered executing code while(1){} from SRAM; M0-core in reset; internal pull-up resistors disabled; PLL1 enabled; IRC enabled; all peripherals disabled; all peripheral clocks disabled. Fig 12. Typical supply current versus temperature in Active mode 002aah611 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 0 20 40 60 80 100 VDD(REG)(3V3) (V) IDD(REG)(3V3) IDD(REG)(3V3) IDD(REG)(3V3) (mA) (mA) (mA) 12 MHz 12 MHz 12 MHz 60 MHz 60 MHz 60 MHz 120 MHz 120 MHz 120 MHz 180 MHz 180 MHz 180 MHz 204 MHz 204 MHz 204 MHz 002aah612 -40 -15 10 35 60 85 0 20 40 60 80 100 temperature (°C) IDD(REG)(3V3) IDD(REG)(3V3) IDD(REG)(3V3) (mA) (mA) (mA) 12 MHz 12 MHz 12 MHz 60 MHz 60 MHz 60 MHz 120 MHz 120 MHz 120 MHz 180 MHz 180 MHz 180 MHz 204 MHz 204 MHz 204 MHz |
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