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M29W640FT bảng dữ liệu(PDF) 20 Page - STMicroelectronics

tên linh kiện M29W640FT
Giải thích chi tiết về linh kiện  64 Mbit (8Mb x8 or 4Mb x16, Page, Boot Block) 3V Supply Flash Memory
PDF  72 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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M29W640FT bảng dữ liệu(HTML) 20 Page - STMicroelectronics

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4 Command Interface
M29W640FT, M29W640FB
20/72
4.1.3
Read CFI Query command
The Read CFI Query Command is used to read data from the Common Flash Interface (CFI)
Memory Area. This command is valid when the device is in the Read Array mode, or when the
device is in Autoselected mode.
One Bus Write cycle is required to issue the Read CFI Query Command. Once the command is
issued subsequent Bus Read operations read from the Common Flash Interface Memory Area.
The Read/Reset command must be issued to return the device to the previous mode (the Read
Array mode or Autoselected mode). A second Read/Reset command would be needed if the
device is to be put in the Read Array mode from Autoselected mode.
See Appendix B: Common Flash Interface (CFI), Tables 22, 23, 24, 25, 26 and 27 for details on
the information contained in the Common Flash Interface (CFI) memory area.
4.1.4
Chip Erase command
The Chip Erase command can be used to erase the entire chip. Six Bus Write operations are
required to issue the Chip Erase Command and start the Program/Erase Controller.
If any blocks are protected then these are ignored and all the other blocks are erased. If all of
the blocks are protected the Chip Erase operation appears to start but will terminate within
about 100
µs, leaving the data unchanged. No error condition is given when protected blocks
are ignored.
During the erase operation the memory will ignore all commands, including the Erase Suspend
command. It is not possible to issue any command to abort the operation. Typical chip erase
times are given in Table 7: Program, Erase Times and Program, Erase Endurance Cycles. All
Bus Read operations during the Chip Erase operation will output the Status Register on the
Data Inputs/Outputs. See the section on the Status Register for more details.
After the Chip Erase operation has completed the memory will return to the Read Mode, unless
an error has occurred. When an error occurs the memory will continue to output the Status
Register. A Read/Reset command must be issued to reset the error condition and return to
Read Mode.
The Chip Erase Command sets all of the bits in unprotected blocks of the memory to
’1’. All
previous data is lost.
4.1.5
Block Erase command
The Block Erase command can be used to erase a list of one or more blocks. Six Bus Write
operations are required to select the first block in the list. Each additional block in the list can be
selected by repeating the sixth Bus Write operation using the address of the additional block.
The Block Erase operation starts the Program/Erase Controller about 50
µs after the last Bus
Write operation. Once the Program/Erase Controller starts it is not possible to select any more
blocks. Each additional block must therefore be selected within 50
µs of the last block. The 50µs
timer restarts when an additional block is selected. The Status Register can be read after the
sixth Bus Write operation. See the Status Register section for details on how to identify if the
Program/Erase Controller has started the Block Erase operation.
If any selected blocks are protected then these are ignored and all the other selected blocks are
erased. If all of the selected blocks are protected the Block Erase operation appears to start but
will terminate within about 100
µs, leaving the data unchanged. No error condition is given when
protected blocks are ignored.



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