9.8.3

LLC OCP2

If the LLC OC2 comparator is triggered for a number of times greater than a threshold set by the user the device

sets the OCP2 fault and it is shut down. The OCP2 fault can be programmed as latched or not latched.

9.8.4

LLC soft-start timeout

If the LLC output voltage cannot reach the regulation value within 100 ms, the device enters the LLC soft-start

timeout fault and it is shut down. The fault can be programmed as latched or not latched.

9.8.5

LLC OVP

If the LLC_AUX pin voltage is higher than the LLC OVP comparator threshold (2.5 V), the system enters the LLC

OVP fault state and it is turned off. The fault can be programmed as latched or not latched and can be disabled.

9.8.6

LLC_CS disconnection

If the LLC_CS pin is stuck at 0 V or 5 V during the soft-start the system enters the LLC_CS disconnection fault

(latched) and it is shut down if the disconnection faults detection is enabled in NVM.

9.8.7

LLC_AUX disconnection

If the pure external burst-mode is enabled and the LLC_AUX pin is stuck at 0 V during the burst and the

LLC_FB pin is higher than the burst comparator threshold, after 32 burst packets, the system enters LLC_AUX

disconnection protection (latched) and it is shut down if the disconnection faults detection is enabled in NVM.

9.9

ADC

The system ADC is an 8-channel 15-MHz SAR 10-bit A/D converter.

It needs 7 cycles (470 ns) for sampling and 11 cycles (740 ns) to convert the data.

It is controlled by a SW programmable scheduler allowing flexible system signals reading:

•

Fixed time sequence conversion

•

Event driven sequence conversion

Table 7. ADC input signals

Signal

Pin

Notes

FSR

Input line voltage

VAC

Internal voltage divider

484.5 V

PFC feedback voltage

PFC_FB

Direct reading

2.5 V

LLC feedback voltage

LLC_FB

Direct reading

2.5 V

9.10

Burst-mode

9.10.1

Specific resources

Burst comparator on LLC_FB pin

The LLC BURST comparator at the LLC_FB pin is used to wake-up the system, in order to perform a burst

sequence.

The comparator is alive also during sleep and the wake-up threshold is programmable (0.75 V, 1 V, 1.25 V).

External burst-mode comparator on LLC_AUX pin

The external burst-mode comparator with the 0.9 V threshold on the LLC_AUX pin is used to enter / exit the

burst-mode using an external digital signal. The external burst-mode operation can be enabled / disabled using a

NVM bit.

30-kHz system oscillator

A 30-kHz oscillator (always on) keeps the system alive.

STNRG011

ADC

DS12075 - Rev 4

page 20/31