MPC8540 datasheet(172/1302 Pages) FREESCALE

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MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev. 1

3-4

Freescale Semiconductor

Signal Descriptions

The following tables provide summaries of signal functions. Table 3-1 provides a summary of the

signals grouped by function, and Table 3-2 provides the summary list of the signals grouped

alphabetically. These tables detail the signal name, interface, alternate functions, number of

signals, and whether the signal is an input, output, or bidirectional. The direction of the

multiplexed signals applies for the primary signal function listed in the left-most column of the

table for that row (and does not apply for the state of the reset configuration signals). Finally, the

table provides a pointer to the table where the signal function is described.

Table 3-1. MPC8540 Signal Reference by Functional Block

Name

Description

Functional

Block

Alternate

Function(s)

No. of

Signals

I/O

Table/

Page

MDQ[0:63]

DDR data

DDR memory

—

I/O

9-3/9-5

MECC[0:7]

DDR error correcting

code

DDR memory

—

I/O

9-3/9-5

MDM[0:7]

DDR data mask

DDR memory

—

9-3/9-5

MDM8

DDR ECC data mask

DDR memory

—

9-3/9-5

MDQS[0:7]

DDR data strobe

DDR memory

—

I/O

9-3/9-5

MDQS8

DDR ECC data strobe

DDR memory

—

I/O

9-3/9-5

MBA[0:1]

DDR bank select

DDR memory

—

9-3/9-5

MA[0:14]

DDR address

DDR memory

—

9-3/9-5

MWE

DDR write enable

DDR memory

—

9-3/9-5

MRAS

DDR row address strobe

DDR memory

—

9-3/9-5

MCAS

DDR column address

strobe

DDR memory

—

9-3/9-5

MCS[0:3]

DDR chip select

(2/DIMM)

DDR memory

—

9-3/9-5

MCKE[0:1]

DDR clock enable

DDR memory

—

9-4/9-8

MCK[0:5], MCK[0:5] DDR differential clocks (3

pairs/DIMM)

DDR memory

—

9-4/9-8

MSYNC_IN,

MSYNC_OUT

DDR DLL

synchronization in/out

DDR memory

—

I/O

9-4/9-8

RIO_RCLK,

RIO_RCLK

RapidIO receive clocks

RapidIO

—

17-5/17-8

RIO_RD[0:7],

RIO_RD[0:7]

RapidIO receive data

RapidIO

—

17-5/17-8

RIO_RFRAME,

RIO_RFRAME

RapidIO receive frame

RapidIO

—

17-5/17-8

RIO_TCLK,

RIO_TCLK

RapidIO transmit clock

RapidIO

—

17-5/17-8

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