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STM32L062C8 bảng dữ liệu(PDF) 94 Page - STMicroelectronics

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Giải thích chi tiết về linh kiện  Ultra-low-power 32-bit MCU Arm®-based Cortex®-M0, 64 KB Flash,8 KB SRAM, 2 KB EEPROM, USB, ADC, DAC, AES
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Electrical characteristics
STM32L062x8
94/124
DS10183 Rev 11
The analog spike filter is compliant with I2C timings requirements only for the following
voltage ranges:
•
Fast mode Plus: 2.7 V
≤ VDD ≤ 3.6 V and voltage scaling Range 1
•
Fast mode:
–2 V
≤ VDD ≤ 3.6 V and voltage scaling Range 1 or Range 2.
–VDD < 2 V, voltage scaling Range 1 or Range 2, Cload < 200 pF.
In other ranges, the analog filter should be disabled. The digital filter can be used instead.
Note:
In Standard mode, no spike filter is required.
SPI characteristics
Unless otherwise specified, the parameters given in the following tables are derived from
tests performed under ambient temperature, fPCLKx frequency and VDD supply voltage
conditions summarized in Table 21.
Refer to Section 6.3.12: I/O current injection characteristics for more details on the
input/output alternate function characteristics (NSS, SCK, MOSI, MISO).
Table 64. I2C analog filter characteristics(1)
1. Guaranteed by characterization results.
Symbol
Parameter
Conditions
Min
Max
Unit
tAF
Maximum pulse width of spikes that
are suppressed by the analog filter
Range 1
50(2)
2. Spikes with widths below tAF(min) are filtered.
100(3)
3. Spikes with widths above tAF(max) are not filtered
ns
Range 2
-
Range 3
-
Table 65. SPI characteristics in voltage Range 1 (1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
--
16
MHz
Slave mode
receiver
16
Slave mode
Transmitter
1.71<VDD<3.6V
--
12(2)
Slave mode
Transmitter
2.7<VDD<3.6V
--
16(2)
Duty(SCK)
Duty cycle of SPI clock
frequency
Slave mode
30
50
70
%



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