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STM32H753II bảng dữ liệu(PDF) 239 Page - STMicroelectronics |
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STM32H753II bảng dữ liệu(HTML) 239 Page - STMicroelectronics |
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239 / 361 page ![]() DS12117 Rev 8 239/360 STM32H753xI Electrical characteristics (rev V) 318 Designing hardened software to avoid noise problems EMC characterization and optimization are performed at component level with a typical application environment and simplified MCU software. It should be noted that good EMC performance is highly dependent on the user application and the software in particular. Therefore it is recommended that the user applies EMC software optimization and prequalification tests in relation with the EMC level requested for his application. Software recommendations The software flowchart must include the management of runaway conditions such as: • Corrupted program counter • Unexpected reset • Critical Data corruption (control registers...) Prequalification trials Most of the common failures (unexpected reset and program counter corruption) can be reproduced by manually forcing a low state on the NRST pin or the Oscillator pins for 1 second. To complete these trials, ESD stress can be applied directly on the device, over the range of specification values. When unexpected behavior is detected, the software can be hardened to prevent unrecoverable errors occurring (see application note AN1015). Electromagnetic Interference (EMI) The electromagnetic field emitted by the device are monitored while a simple application, executing EEMBC code, is running. This emission test is compliant with SAE IEC61967-2 standard which specifies the test board and the pin loading. Table 152. EMI characteristics Symbol Parameter Conditions Monitored frequency band Max vs. [fHSE/fCPU] Unit 8/400 MHz SEMI Peak level VDD = 3.6 V, TA = 25 °C, UFBGA240 package, conforming to IEC61967-2 0.1 to 30 MHz 11 dBµV 30 to 130 MHz 6 130 MHz to 1 GHz 12 1 GHz to 2 GHz 7 EMI Level 2.5 - |
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