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STM32H753II bảng dữ liệu(PDF) 151 Page - STMicroelectronics

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STM32H753II bảng dữ liệu(HTML) 151 Page - STMicroelectronics

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DS12117 Rev 8
151/360
STM32H753xI
Electrical characteristics (rev Y)
318
Synchronous waveforms and timings
Figure 27 through Figure 30 represent synchronous waveforms and Table 73 through
Table 76 provide the corresponding timings. The results shown in these tables are obtained
with the following FMC configuration:
•
BurstAccessMode = FMC_BurstAccessMode_Enable
•
MemoryType = FMC_MemoryType_CRAM
•
WriteBurst = FMC_WriteBurst_Enable
•
CLKDivision = 1
•
DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM
In all the timing tables, the Tfmc_ker_ck is the fmc_ker_ck clock period, with the following
FMC_CLK maximum values:
•
For 2.7 V<VDD<3.6 V, FMC_CLK =100 MHz at 20 pF
•
For 1.8 V<VDD<1.9 V, FMC_CLK =100 MHz at 20 pF
•
For 1.62 V<VDD<1.8 V, FMC_CLK =100 MHz at 15 pF
Table 72. Asynchronous multiplexed PSRAM/NOR write-NWAIT timings(1)
Symbol
Parameter
Min
Max
Unit
tw(NE)
FMC_NE low time
9Tfmc_ker_ck – 1
9Tfmc_ker_ck
ns
tw(NWE)
FMC_NWE low time
7Tfmc_ker_ck – 0.5 7Tfmc_ker_ck + 0.5
tsu(NWAIT_NE)
FMC_NWAIT valid before FMC_NEx high
6Tfmc_ker_ck + 3
-
th(NE_NWAIT)
FMC_NEx hold time after FMC_NWAIT invalid
4Tfmc_ker_ck
-
1. Guaranteed by characterization results.



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