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STA540SA bảng dữ liệu(PDF) 23 Page - STMicroelectronics |
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STA540SA bảng dữ liệu(HTML) 23 Page - STMicroelectronics |
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23 / 30 page ![]() STA540SA General structure Doc ID 16066 Rev 2 23/30 8.9 PCB-layout grounding (general rules) The device has two distinct ground leads, P_GND (power ground) and S_GND (signal ground) which are practically disconnected from each other at chip level. Correct operation requires that P_GND and S_GND leads be connected together on the PCB layout by means of reasonably low-resistance tracks. For the PCB ground configuration a star-like arrangement, where the center is represented by the supply-filtering electrolytic capacitor ground, is recommended. In such context, at least two separate paths must be provided; one for power ground and one for signal ground. The correct ground assignments are as follows: standby capacitor (pin 9, or any other standby driving networks): on signal ground SVR capacitor (pin 8): on signal ground and to be placed as close as possible to the device input signal ground (from active/passive signal processor stages): on signal ground supply filtering capacitors (pins 3 and 17): on power ground. The negative terminal of the electrolytic capacitor must be directly tied to the battery negative line and this should represent the starting point for all the ground paths. Obsolete Product(s) - Obsolete Product(s) |
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