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SPC574S60E3BXXXR bảng dữ liệu(PDF) 7 Page - STMicroelectronics |
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SPC574S60E3BXXXR bảng dữ liệu(HTML) 7 Page - STMicroelectronics |
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7 / 77 page  DS10601 Rev 6 7/77 SPC574Sx Introduction 76 1.3 Feature overview On-chip modules within the SPC574Sx include the following features: • Operating parameters – Fully static operation, up to 140 MHz – Up to -40 °C to 150 °C junction temperature operating range • Power management features – HALT mode — core clocks are stopped but the PLL is configurable – STOP mode — all clocks are stopped including the PLLs – Software-controlled clock gating of peripherals • High performance, low cost e200z420 core processor – 32-bit CPU core complex (e200z420n3) – Compliant with the Power Architecture® embedded category – Includes an instruction set enhancement allowing variable length encoding (VLE) for code size footprint reduction. Optional encoding of mixed 16-bit and 32-bit instructions makes it possible to achieve significant code size footprint reduction. • Advanced and flexible supply scheme – Internal or External regulator mode for 1.2 V supply – 3.3 V +/- 5% or 5 V +/- 5% – Up to 2 power rails for GPIOs and 2 power rails for analog/input pins enabling supply redundancy concept. – The 4 power rails can be supplied in independent way (depending on selected package and device configuration) • Designed with EMI reduction techniques – Internal phase-locked loop – Frequency modulation of system clock frequency – On-chip regulator – Controlled I/O slew rate • Advanced microcontroller bus architecture (AMBA) crossbar switch (XBAR) providing concurrent access to peripherals, Flash memory and SRAM – 4 master ports: FlexRay, DMA, CPU instruction bus and CPU data bus – 5 slave ports: Flash Controller, TCM Back-door (Port to local Data RAM), RAM controller, PBRIDGE0 and PBRIDGE1 • 32-bit internal address bus, 32-bit internal data bus • ECC (Error Correction Code) Flash memory with Flash controller – Up to 1.5 MB Code Flash—single module with prefetch buffer and 256-bit data access port – 64 KB Data Flash—single module with prefetch buffer and 256-bit data access port • Up to 96 KB ECC SRAM with RAM controller (in addition to 32 KB core local data RAM) • 16 KB dedicated OTP Flash for embedded boot code – Boot Assisted Flash (BAF) – Supports internal Flash programming via a serial link (UART and MCAN) |
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