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LSM6DSTTR bảng dữ liệu(PDF) 63 Page - STMicroelectronics |
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LSM6DSTTR bảng dữ liệu(HTML) 63 Page - STMicroelectronics |
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63 / 180 page ![]() DocID033525 Rev 2 63/180 LSM6DST Application hints 180 7.3 LSM6DST electrical connections in Mode 3 and Mode 4 Figure 25. LSM6DST electrical connections in Mode 3 and Mode 4 (auxiliary 3/4-wire SPI) 1. Leave pin electrically unconnected and soldered to PCB. Note: When Mode 3 and 4 are used, the pull-up on pins 10 and 11 can be disabled (refer to Table 21: Internal pin status). To avoid leakage current, it is recommended to not leave the SPI lines floating (also when the OIS system is off). The device core is supplied through the Vdd line. Power supply decoupling capacitors (C1, C2 = 100 nF ceramic) should be placed as near as possible to the supply pin of the device (common design practice). The functionality of the device is selectable and accessible through the SPI/I²C/I³C primary interface. Measured acceleration/angular rate data is selectable and accessible through the SPI/I²C/MIPI I3CSM primary interface and auxiliary SPI. The functions, the threshold and the timing of the two interrupt pins for each sensor can be completely programmed by the user through the SPI/I²C/MIPI I3CSM interface. |
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