AP3303

Document number:DS41016 Rev. 5 - 2

5 of 16

www.diodes.com

May 2019

© Diodes Incorporated

AP3303

Electrical Characteristics (@TA = -40 to +85°C, VCC = 18V, unless otherwise specified.)

Symbol

Parameter

Condition

Min

Typ

Max

Unit

Supply Voltage (VCC Pin)

IST

Startup Current

—

—

1

15

μA

ICC

Operating Supply Current

VFB = 4V, CL = 0nF

(Note 7)

1.2

1.6

2.2

mA

ICC-FAULT

Operating Current when Fault Occurs

VFB = 4V, VSENSE = 0V

(Note 7)

0.25

0.4

0.55

VST

Startup Voltage

—

14.3

15.8

16.3

V

VM

VCC Maintain Voltage

—

—

7.3

—

V

VUVLO

Shutdown Voltage

—

6.1

6.7

7.1

V

VCC-OVP

VCC OVP Voltage

—

32

33

34

V

PWM Section/Oscillator Section

fOSC-MAX

Maximum Clamp Frequency

(Note 7)

—

120

—

kHz

fOSC-MIN

Minimum Clamp Frequency

(Note 7)

20

24

28

kHz



fOSC-JITTER

Valley Blanking Time Dithering

(Note 7)

—

±12

—

%

tDITHER

Frequency Dithering Period

—

—

4

—

ms

Current Sense Section (SENSE Pin)

VSENSE-MAX

Current Limit Threshold

IDEM_SOURCE = 200µA

0.89

0.96

1.04

V

VTH-FOCP

FOCP Voltage

—

—

1.25

—

V

tDELAY-FOCP

FOCP Debounce Time (Note 8)

—

—

7

—

Cycles

tLEB

Leading Edge Blanking Time

—

150

250

350

ns

VTH-SSCP

SSCP Voltage

—

—

100

—

mV

tSOFT-ST

Soft-Start Time

—

3

4

8

ms

tDELAY-SENSE

Sense Propagation Delay (Note 9)

—

—

100

—

ns

Feedback Input Section (FB Pin)

KFB-SENSE

The Ratio of Input Voltage to Current

Sense Voltage (Note 9)

—

—

4

—

V/V

RFB

Input Impedance

—

20

30

40

kΩ

IFB-SOURCE

Source Current

VFB = 0V

0.1

0.2

0.3

mA

GQR

QR Mode Frequency Modulation Slope

Versus VFB (Note 9)

—

—

94

—

kHz/V

VBURST

Threshold for Entering Burst Mode

VDEM < 0.75V

—

0.66

—

V

0.75V <

VDEM < 1.45V

—

0.8

—

V

VDEM > 1.45V

—

0.933

—

V

tON-MAX

Maximum on Time

(Note 7)

16

18.5

21

μs

tDELAY-OLP

Delay of Over Load Protection (Note 9)

—

—

70

—

ms

VFB-OLP

Over Load Protection (Note 9)

—

—

4.2

—

V

Notes:

7. Data measured in IC test mode.

8. Cycle-by-Cycle limit delay time contains OCP comparator delay time and driver delay time, Guaranteed by design.

9. Guaranteed by design.