6.5

Enable pin

The enable function allows the LDO output to be enabled/disabled. The regulator is turned on in case the pin EN

is connected to a voltage higher than VEN-H, the LDO can be turned off if the voltage on EN pin is lower than

VEN-L.

No internal pull-up / pull-down is present on the EN pin, therefore it must not be left floating in the application.

6.6

Input and output capacitors

The LDO40LY requires external capacitors to ensure the regulator control loop stability.

A capacitor with a minimum value of 1 μF is required on at the input port of the LDO40LY.

This capacitor must be located as close as possible to the input pin of the device and returned to a clean analog

ground. Good quality ceramic capacitors are suggested.

The device control loop is designed to be stable with good quality ceramic capacitors (such as: X5R/X7R types)

with a minimum capacitance of 1 μF and equivalent series resistance in the [5 mΩ – 12 Ω] range. There is no

upper limit to the output capacitance. Figure 27. Stability plan shows the stability plan tested on real capacitors,

up to 10 µF. A value of 4.7 μF is suitable for the majority of applications, improving dynamic response and

minimizing the risk of ringing and oscillations. It is important to highlight that the output capacitor must maintain its

capacitance and ESR in the stable region over the full operating temperature, load and input voltage ranges, to

assure stability. Therefore, capacitance and ESR variations must be taken into account in the design phase to

ensure the device works in the expected stability region. There is no maximum limit to the output capacitance,

provided that the above conditions are respected.

LDO40L

Enable pin

DS12711 - Rev 3

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