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L9908 bảng dữ liệu(PDF) 132 Page - STMicroelectronics |
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L9908 bảng dữ liệu(HTML) 132 Page - STMicroelectronics |
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132 / 153 page ![]() WDT_OVF_CFG Description 11 1.6384 ms Reprogramming of WDT_OVF_CFG configuration is possible only while WDT_EN = 0 Table 147. WDT overflow counter accuracy Symbol Parameter Min Typ Max Unit WDT_ovf_acc WDT overflow counter accuracy -10 - 10 % Within this window the watchdog expects a refresh pulse to reset the overflow counter and restart a new window: if refresh is missed before the overflow counter is elapsed the error flag WDT_OVF_Fail is set and L9908 is sent to safe state. The flag remains set until the WDT is reset by the SPI command or re-enabled after a power-on sequence. Figure 86. WDT Operation – Overflow timer failure The refresh of the overflow counter has to be performed by the uC through a dedicated SPI frame including the 4-bit watchdog refresh command. The watchdog circuitry compares the received watchdog refresh command with an internal look-up table and answers with a corresponding 4-bit Gray code in the next SPI MISO frame. Table 148. Watchdog Binary to Gray answer conversion Binary (μC) → Gray (L9908) Binary → (μC) → Gray (L9908) Binary (μC) → Gray (L9908) Binary (μC) → Gray (L9908) 0x0 (0000) → 0x0 (0000) 0x4 (0100) → 0x6 (0110) 0x8 (1000) → 0xC (1100) 0xC (1100) → 0xA (1010) 0x1 (0001) → 0x1 (0001) 0x5 (0101) → 0x7 (0111) 0x9 (1001) → 0xD (1101) 0xD (1101) → 0xB (1011) 0x2 (0010) → 0x3 (0011) 0x6 (0110) → 0x5 (0101) 0xA (1010) → 0xF (1111) 0xE (1110) → 0x9 (1001) 0x3 (0011) → 0x2 (0010) 0x7 (0111) → 0x4 (0100) 0xB (1011) → 0xE (1110) 0xF (1111) → 0x8 (1000) The expected watchdog command order starts with number 0x0 (0000) and is incremented by 1 at each refresh window if the command is correctly interpreted and no failure is detected. Once command number 0xF (1111) is reached the sequence restarts with number 0x0 (0000). L9908 Window Watchdog Timer (WTD) DS13546 - Rev 3 page 132/153 |
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