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MP23ABS1 bảng dữ liệu(PDF) 9 Page - STMicroelectronics |
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MP23ABS1 bảng dữ liệu(HTML) 9 Page - STMicroelectronics |
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9 / 15 page ![]() DocID031167 Rev 6 9/15 MP23ABS1 Reliability tests 15 6 Reliability tests The device passed all reliability tests on three different assembly lots under the following conditions given in the table below. Table 7. Reliability specifications Test name Description Conditions Electrostatic Discharge Immunity Test (ESD) To classify ESD susceptibility the device is submitted to a high voltage peak on all his pins, simulating ESD stress according to different simulation models (GUN, HBM, MM, CDM) ESD-GUN: 25 discharges at ±8 kV, direct contact to housing of MIC Reference specification IEC 61000-4-2 ESD-HBM 3 discharges up to ±2 kV pin-to-pin Reference specification ANSI/ESDA/JEDEC JS001 ESD-MM, 3 discharges up to ±200 V pin-to-pin Reference specification JEDEC JESD22-A115C ESD-CDM, 3 discharges up to ±750 V Reference specification ANSI/ESDA/JEDEC JS002 Latch-Up (LU) To verify latch-up immunity the device is submitted to a current injection on I/O or supply overvoltage ±100 mA & 1.5 x Vdd @ 85 °C Reference specification JEDEC JESD78 High Temperature Operative Life (HTOL) To simulate the worst-case application stress conditions, the device is stressed in dynamic configuration at operative max. absolute ratings Ta 125 °C, Tj 125 °C, 1000 Hrs, @ Max Op Voltage Preconditioning (PC) before Reference specification JESD22-A108 Temperature Humidity Bias (THB) To investigate failure mechanisms activated by electrical field and humidity, the device is biased in static or dynamic operative conditions at controlled high temperature and relative humidity Ta 85°C, R.H. 85%, 1000 Hrs, @ Max Op Voltage Preconditioning (PC) before Reference specification JESD22-A101 Preconditioning MSL3 (PC) To investigate effects of customer manufacturing soldering enhanced by package water absorption, the device is submitted to typical temperature profile after controlled moisture absorption MSL3 as moisture soak conditions followed by n.3 reflow @ Tpeak 260 °C Reference specification JEDEC J-STD-020 Low Temperature Storage (LTS) To investigate the failure mechanisms activated by extremely cold conditions, the device is stored in unbiased condition at the min. temperature allowed by the package materials Ta = -40 °C, 1000 Hrs Reference specification JESD22-A120 |
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