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SH79F6489P/080PR bảng dữ liệu(PDF) 36 Page - SINOWEALTH Electronic Ltd |
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SH79F6489P/080PR bảng dữ liệu(HTML) 36 Page - SINOWEALTH Electronic Ltd |
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36 / 152 page  SH79F6488/SH79F6489 36 Table 7.16 PLL Clock Control Register B3H Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 PLLCON - - - - - - PLLON PLLFS R/W - - - - - - R/W R/W Reset Value (POR/WDT/LVR/PIN) - - - - - - 0 0 Bit Number Bit Mnemonic Description 1 PLLON PLL On control Register 0: PLL off 1: PLL on Only when OSC2ON = 1, this bit is valid. 0 PLLFS PLL system clock select Register 0: PLL is not selected as OSC2CLK 1: PLL is selected as OSC2CLK PLL 1/2 Prescaler frequency used as OSC2CLK, OSC2CLK = 24MHz Table 7.17 Internal RC adjust control register BDH Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CLKLO CLKRCEN - - - CLKLO.3 CLKLO.2 CLKLO.1 CLKLO.0 R/W R/W - - - R/W R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) 0 - - - 0 0 0 0 Bit Number Bit Mnemonic Description 7 CLKRCEN Internal RC software adjust control register 0: software adjust disable, adjust by hardware 1: software adjust enable, and CLKRC0 is valid 3-0 CLKLO[3:0] Internal RC software adjust lock register Only when CLKLO = 0x8A, CLKRC0 could be modified Table 7.18 Internal RC adjust register BEH Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CLKRC0 CLKRC0.7 CLKRC0.6 CLKRC0.5 CLKRC0.4 CLKRC0.3 CLKRC0.2 CLKRC0.1 CLKRC0.0 R/W R/W R/W R/W R/W R/W R/W R/W R/W Reset Value (POR/WDT/LVR/PIN) u u u u u u u u Bit Number Bit Mnemonic Description 7-0 CLKRC0[7:0] Internal RC adjust register Only when CLKLO = 0x8A, CLKRC0 could be modified. Every adjusting range is about 0.25% Reset value is the factory correction values Table 7.19 Internal RC initial adjust value register BFH Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 CLKRC1 CLKRC1.7 CLKRC1.6 CLKRC1.5 CLKRC1.4 CLKRC1.3 CLKRC1.2 CLKRC1.1 CLKRC1.0 R/W R R R R R R R R Reset Value (POR/WDT/LVR/PIN) u u u u u u u u Bit Number Bit Mnemonic Description 7-0 CLKRC1[7:0] Internal RC initial adjust value register This register is read-only. The data is factory correction values of 12MHz RC. |
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