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RHRDAC1612 bảng dữ liệu(PDF) 13 Page - STMicroelectronics |
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RHRDAC1612 bảng dữ liệu(HTML) 13 Page - STMicroelectronics |
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13 / 47 page ![]() RHRDAC1612 DAC operation DocID029369 Rev 2 13/47 4.2 DAC configuration registers Figure 9: Data and control frame format Address = 01h Configuration bit register: this 8-bit register is used to configure and control the DAC. Offset byte register: this 8-bit register is used to read the result of the offset calibrati on of the DAC. The result is in two’s complement format. If the value is in the range of 01h to FEh, the auto-calibration has gone well. If the value is 00h or FFh, the device cannot compensate the offset and there is an internal problem. If the result is 80h, the device has no offset error to compensate. Address = 02h DAC data byte: this 16-bit register is used to set the output voltage of the DAC. Table 5: "DAC configuration bits and function" shows the name and the function of each bit. Table 5: DAC configuration bits and function Address Config. bit/data Name POR or ASRSTN value Read/Write possibilities Description 01h 0 = LSB CAL 0 Read This bit gives the calibration status. If set to 0, it indicates calibration is ongoing. If set to 1, it indicates calibration is complete. This bit is cleared to 0 after reading the configuration bit register. |
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