HT46R71D datasheet(4/46 Pages) HOLTEK

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Pin Name

I/O

Options

Description

DOPAN,

DOPAP,

DOPAO,

DCHOP

AI/AO

Dual Slope converter pre-stage OPA related pins. DOPAN is OPA

Negative input pin, DOPAP is OPA Positive input pin, DOPAO is OPA

output pin and the DCHOP is OPA Chopper pins.

DSRR,

DSRC,

DSCC

AI/AO

Dual slope AD converter main function RC circuit. DSRR is the input or

reference signal, DSRC is the Integrator negative input, and DSCC is

the comparator negative input.

OSC1

OSC2

External RC

OSC1, OSC2 are connected to an external RC network for the internal

system clock. For external RC system clock operation, OSC2 is an out-

put pin for 1/4 system clock.

RES

Schmitt trigger reset input, active low

VDD

¾¾

Positive power supply

VSS

¾¾

Negative power supply, ground

AVSS

¾¾

Analog negative power supply, ground

Absolute Maximum Ratings

Supply Voltage ...........................VSS

-0.3V to VSS+6.0V

Storage Temperature ............................

-50°Cto125°C

Input Voltage..............................VSS

-0.3V to VDD+0.3V

Operating Temperature...........................

-40°Cto85°C

Note: These are stress ratings only. Stresses exceeding the range specified under

²Absolute Maximum Ratings² may

cause substantial damage to the device. Functional operation of this device at other conditions beyond those

listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-

ity.

D.C. Characteristics

Ta=25

°C

Symbol

Parameter

Test Conditions

Min.

Typ.

Max.

Unit

VDD

Conditions

VDD

Operating Voltage

¾ fSYS=4MHz

2.2

5.5

IDD1

Operating Current

(External RC OSC)

No load, ADC off,

fSYS=2MHz

0.5

1.5

IDD2

Operating Current

(External RC OSC)

No load, ADC off,

fSYS=4MHz

0.8

1.5

2.5

IDD3

Operating Current

(External RC OSC)

No load, ADC on,

fSYS=4MHz,

ADCCLK=125kHz

ISTB1

Standby Current

(WDT Disable)

No load, system HALT,

LCD off at HALT

¾¾

ISTB2

Standby Current

(WDT Enable)

No load, system HALT,

LCD off at HALT, ADC off

2.5

815

ISTB3

Standby Current (WDT Disable

Internal RC 12kHz OSC ON)

No load, system HALT,

LCD off at HALT, ADC off

610

ISTB4

Standby Current (WDT Disable

Internal RC 12kHz OSC ON)

No load, system HALT,

LCD on at HALT, 1/2 bias,

VLCD=VDD

HT46R71D

Rev. 1.00

January 9, 2006

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